BKPT PROBE · CAPTURE HARDWAREDS-0004 · REV A · 2026
BKPT #1
BreakPoint One is a new debug and capture probe that replaces the legacy hardware on your desk (those "-Link" boxes, whichever letter yours happens to start with), and sits somewhere closer to a full trace rig minus the several thousand dollar price tag. Built from the bottom up with AI as a first-class citizen but not a requirement.
BreakPoint One is different.
We built this down to the logic that clocks the wires, so none of it has to stay ours. At its core it is a full debug probe: flash, halt, step and trace, everything you already expect from the box on your desk. The difference is what it runs on. The capture engine sits on programmable FPGA fabric, and most of that fabric is left open for you: not because we couldn't fill it, but because the best instrumentation is the one you build for your own problem.
When you realize the debug port is the most privileged sensor on your board, the debug probe stops being just a debugger and becomes the measurement plane for your entire board.
Pick a spare pin and give it a job.
Traditional probes reserve that headroom for next year's product release. We hand it to you.
A probe you can teach your own tricks.
The instrument port is where that spare fabric reaches the outside world: pins the gateware will wire up to whatever your problem needs, with no HDL and no vendor toolchain in your way.
Take a trigger input from your bench. Put a clock or a sync pulse out. Run logic analyzer lanes beside the instruction trace. Put a trigger on a function and route it to a pin your scope can see. Feed an edge back in and freeze the capture around the moment it fired, with the history that led up to it already in the buffer. Every edge is stamped by the same hardware clock as the code.
You configure all of it from the app, and everything the app can set is a documented command, so the same setup runs from a script on the bench or in CI. The probe reports exactly what it can do, and the tools show you exactly that.
Capture is a physics problem.
Instruction trace at full clock rate needs bandwidth and timestamping that generic probes were never designed for. Owning the front end sets the ceiling for every tool above it.
Every tool reads the capture.
ViewAlyzer visualizes it, BKPT Studio's agent queries it, Assert tests against it. One acquisition layer, no format seams, no vendor glue.
Your probe works today.
The whole software stack runs over standard debug probes right now. BreakPoint One raises the ceiling; it is not a prerequisite.
What it is. What it is not.
These are good instruments, and this is not a hit piece. The ST-LINK is nearly free and already on every Nucleo. J-Link earned two decades of being the industry default. J-Trace PRO is the reference streaming trace instrument: if your work is Cortex-A, certification coverage evidence, or a validation lab that traces everything in the catalog, buy one.
Our argument is about where instruction trace starts on that shelf: $1,880, in hardware engineered for the validation lab, carrying capabilities most firmware engineers will never book time on. Most days you just need to know: what did my firmware actually do. Hardware trace answers that question, and it belongs on every bench, not behind a two thousand dollar paywall. That tier did not exist, so we are building it.
- Your target is Cortex-A / R, or not ARM at all
- You need coverage evidence a certification auditor will accept
- The probe must flash anything in the building, today
- Keil or IAR integration is non-negotiable
- The daily question: what did my firmware actually do
- Trace as a daily habit, not a booked lab slot
- A bench where firmware, power, and external events share one clock
- Engineers who want to build their own instrumentation
J-Link and J-Trace are trademarks of SEGGER Microcontroller GmbH. ST-LINK is a trademark of STMicroelectronics. BKPT Labs is not affiliated with, or endorsed by, either company. Prices are US web-shop list prices as of July 2026; capabilities are summarized from public vendor documentation. Spot an error? Tell us and we will fix it.
Current and instructions, on one time axis.
We put a Joulescope JS320 in series with the target rail and asked for one thing: milliamps on the same axis as the instruction trace. Neither product was built for that, and there was nobody to ask. So we taught the probe a new trick: a trigger input, a command to drain the latched edges, and a merge step that folds the power series into the capture file. Idea to fused recording on hardware: one week.
Nothing about it is specific to Joulescope. A scope, a logic analyzer, an RF sniffer, a robot's own log stream: give it a wire and a timestamp and it joins the same record.
READ THE FULL CASE
None of this needed anyone's permission.
Every item below runs on hardware today or is one firmware update away. The list grows because the fabric has room, not because a vendor roadmap said this was the year.
Energy, per function.
Current is carried in the capture, so milliwatts sit in the function table next to cycles. Optimize the battery against evidence instead of a theory.
Profiling while it runs.
Thousands of program counter samples a second off a running target, with no instrumentation in the build and no halt. One firmware change took ours from 137 a second to 6,866, because the limit was the probe and not the chip.
Your bench, one clock.
A trigger in and a trigger out, timestamped in hardware. Anything else on the desk can be pinned to the same microsecond as the code that caused it.
Four readers, no glue.
ViewAlyzer draws the capture, Studio's agent queries it, Assert tests against it, your own scripts open it. A documented file, not a vendor blob.
Timing you can fail a build on.
Because the capture is a file and the probe is scriptable, a deadline budget becomes an assertion that runs on real silicon on every push.
A record an agent can read.
Machine readable ground truth about what the chip actually did, queryable in place. Not screenshots of a waveform, and not a log you remembered to add.
TARGET SPECIFICATIONS · SUBJECT TO CHANGE
Be first on the wire.
Embedded engineers have been renting access to their own silicon for thirty years. That era is ending. Early access teams get engineering updates, hardware on the bench before general availability, and a say in the connector we should not get wrong.