Capture hardware
Bandwidth and timing
Instruction trace at full clock rate needs dedicated bandwidth and accurate timestamps. Control of the capture hardware gives the software reliable evidence of target behavior.
Programmable debug & trace hardware
BKPT Probe #1
In developmentA modular, high-speed debug probe with programmable I/O. Plug your instruments into it and your entire bench becomes one instrument, for you and your AI.
Designed to synchronize bench instruments, correlate power with instruction trace, and trigger oscilloscopes on firmware events.
Explainer · 88 s
Every instruction, every milliwatt
How BKPT Probe #1 brings your scope, logic analyzer, and power analyzer onto one clock and one timeline with the code running on your chip.
Programmable by design
Configure the probe for your bench
The instrument port is designed to connect the debug probe to the rest of your bench. Configurable trigger inputs, clock outputs, synchronization pulses, and logic lanes let the hardware adapt to the investigation.
The goal: route a trigger to an oscilloscope, or freeze a capture around an external edge, with a shared hardware timing reference that connects the measurement to the code.
A shared command interface is part of the design, so configurations can move between the app, bench scripts, and CI.
- Input
- Trigger edges and logic lanes, latched at the capture clock
- Output
- Clocks, sync pulses, and patterns your bench gear can follow
- Trigger
- A function, a data value, or an external edge, in either direction
- Capture
- Arm, freeze, and pre-trigger around the event that matters
- Script
- One documented protocol shared by the app, the CLI, and CI
- Integration
- External instruments connected through a shared timing reference
Shared capture data
One record across the tools
ViewAlyzer brings captured execution into a visual investigation. Saved recordings also give scripts and analysis tools a record they can revisit.
Existing equipment
Part of your current bench
BKPT Probe #1 is being designed alongside the BKPT software tools to extend capture and instrumentation. The software already works with standard debug probes.
From the development bench
See what the firmware did
Instruction trace captures the execution path without adding logging to the firmware. Open the recording in ViewAlyzer to follow calls, inspect timing, and connect the behavior to your source.
This recording comes from earlier development hardware. It shows the capture and analysis workflow behind BKPT Probe #1.
Explore ViewAlyzerBench study · Power and trace
Current and instructions on one timeline
In an earlier prototype study, a Joulescope JS320 recorded current and power from the target rail. The development probe timestamped synchronization edges so those measurements could be aligned with instruction trace.
The result connects energy use to the functions that caused it. The same approach can connect other instruments and external event streams through a common timing reference.
Read the full field note
Engineering workflows
From capture to evidence
Earlier prototype work and capture workflows that inform the BKPT Probe #1 design.
Energy per function
Current measurements travel with the capture, placing power data alongside execution time and cycles in the function table.
Profiling a running target
Collect program counter samples without instrumenting or halting the firmware. A probe firmware update increased our measured sampling rate from 137 to 6,866 samples per second.
Synchronized bench instruments
Hardware-timestamped trigger inputs and outputs connect external measurements to the code running on the target.
Reusable capture files
Open the saved record in ViewAlyzer, return to the evidence after the session, or process it through the command-line analysis tools.
Timing checks in CI
A scriptable probe and saved capture let teams turn deadline budgets into repeatable checks on real silicon.
Structured evidence for AI agents
Agents can query the recorded target behavior directly and use the relevant evidence to investigate a problem.
Development hardware
Hardware design targets
Planned capabilities, subject to change as the hardware and firmware develop.
- Interfaces
- 20 pin Cortex debug + trace · SWD / JTAG / SWO / ETM
- Record
- Instruction level, timestamped at capture
- Output
- USB-C · USB 3 SuperSpeed streaming to the host
- Targets
- Arm Cortex-M instruction trace first
- Software
- Native across the whole BKPT stack
- Sync
- Trigger in / out, edges timestamped in hardware
- Expansion
- User assignable I/O: triggers, clocks, logic lanes, set in software
- Firmware
- Field updatable, versioned, capability reported to the host
- Status
- In development
Waitlist
Join the BKPT Probe #1 waitlist
Your interest helps demonstrate demand as we seek funding to bring the probe to life.
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Help shape BKPT Probe #1
Tell us what you want to capture, measure, or build into your bench.